Fresher Hiring For Intern @ "Synopsys" in Bangalore
About Company
Name: Synopsys
Website: www.synopsys.com
Job Details:
Education: B.E/B.Tech/M.E/M.Tech
Experience: Freshers
Job Location: Bangalore
Job Description:
Intern
The focus of work would be VLSI design/Verification in one of the following areas related to
connectivity protocols: USB/Ethernet/AMBA/MIPI/Memory Controllers.
Architecture exploration of the sub-blocks within one of these IPs to optimize for area, speed
and power
VLSI Design & verification of these sub-blocks / exploration of latest features and standards.
Based on project assigned, the job would involve one or more of the following activities:
Verilog/System Verilog/ Vera coding, Exposure to UVM methodology, working with EDA tools like
Design Compiler for Synthesis, SpyGlass for Lint, VCS for simulation.
Candidate Profile
The candidate must have completed Bachelors degree in Electronics/ Electrical Engg.
Partial completion of MS/MTech preferable. (Electrical/Electronics/VLSI/MicroElectronics or allied
specializations.)
Minimum 7.0 CGPA/ 70% in Bachelor in engineering and 7.5 CGPA in Masters till the current
semester.
Need to be backed with consistently high academics in 10th std and 12th standard.
Strong fundamentals in Digital electronics.
HDL Languages coding experience preferably in Verilog/Vera/System Verilog.
Tenure: Typically 6 months to 12 months based on academic requirement and extendible based on
performance.
For Future Reference.
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